Zen 3 downvolt, beyound expectations

[BS86]

@mbod

What do you mean with “verify”?

@BS86

One feature of PBO is that the temperature is reported 10° higher to make FAN curves ramp up faster to allow for further overclocking.
It can be seen with sensors:

k10temp-pci-00c3
Adapter: PCI adapter
Tctl:         +54.6°C  
Tdie:         +44.6°C

Tctl is the reported temperature for the FAN curve, Tdie is the real temperature.

Check if there still is a difference between Tctl and Tdie with PBO disabled. Check if with PBO enabled, there is a difference. It might be a false positive because Tctl could be 10° lower because it now reports the same value as Tdie. Tctl on Ryzen is not a valid way of measuring temperature due to the artificial increase on code-level to increase the effect of PBO.

@mbod

I didnt say that. curve optimizer negative at values around 20-30 changes the voltage. The point is, that PBO Limits set to “disable” or “Motherboard” makes a difference for me in terms of performance and temperature.

Yes, but your initial post here:

@mbod

My experience is, that the temperature does not go down but CPU frequency goes up. May be idle temperature is lower but certainly not temperature under load.

For my Ryzen 9 5900x the speed increase is minimal: 3-4 %.

@mbod

When I set PBO Limits to “Motherboard” (this is where I started) I get better performance by 3-4 %

you did not specify that you are doing chipset undervolting, but reported your findings as if they were done while CPU-undervolting. You are doing something else then is expected in this topic - it is good what you are doing, but you should make it clear that you are doing something else.

[mbod]

@BS86

Check if there still is a difference between Tctl and Tdie with PBO disabled.

I dont see Tdie in my sensors. I dont know why.

k10temp-pci-00c3
Adapter: PCI adapter
Tctl:         +37.2°C  
Tccd1:        +35.8°C  
Tccd2:        +37.2°C

When I compare Tctl with Tccd1/2 I can see that all three are more or less equal. During the mprime load testing they are basically the same. No big difference. Tccd2 is max 5 °C lower that the other two.

[anon49550872]

I got all the values from CoreCycler… found the stable voltage for each core individually. Tested for 6 hours with no core crash.

However, Prime95 FTT test was crashing with those values and CoreCycler wasn’t.

So, in order to get maximum stability, I’ve been doing some tests and found that something between -15mV and -10mV for all cores is perfect for me.

I’m getting 3% more performance in Benchmarks, maximum of 58 Celsius in prime95 torture test (which is great) and its stable.

[moson]

@BS86

have you verified if it is really lower by 10°

@mbod

I dont see Tdie in my sensors. I dont know why.

When there is no offset for Tctl, Tdie is not shown (since it will be the same anyways).
It’s only certain models where an offset is applied to Tctl:

torvalds/linux/blob/ce522ba9ef7e2d9fb22a39eb3371c0c64e2a433e/drivers/hwmon/k10temp.c#L103